Related Interview Questions of part --5 of --13

Write about the following instruction :
Posted in Microprocessors Interview Questions
MOV CS:[BX], DLMOV CS:[BX],DL - It copies a byte from DL Register. Effective Address for the memory location is contained in the BX Register. Normally an effective address in BX will be added to the data segment base in DS to produce the physical memory address. In this instruction CS: indicates that we want the BIU to add the effective address to the code segment base in CS to produce the physical address.
Post Your Answer!
Send This to a Friend
← What is difference between DIV and IDIV instruction in 8086 ?
What is Programmed I/O ? →

Related Interview Questions
What are the five stages in a DLX pipeline? 26.11.08
Instruction Fetch Stage Instruction Decode Stage Instruction Execution Stage Memory Stage Write Back...
What are the stages of DLX pipelining ? 26.11.08
5 stages in DLX pipeling: 1. Instruction Fetch. 2. Instruction Decode. 3. Execute. 4. Memory Access and 5. Write Back....
Write about the following instruction : 14.11.08
Offset of the first instruction of procedure is in two memory addresses in DS. It replaces the contents of IP with contents of word memory locations in DS point...
What is the use of TEST instruction in 8086? 14.11.08
Test instruction is the same as the AND instruction except that ite does not put the result anywhere. Like the CMP instruction , it is used only to set the flag...
How the execution time of an instruction is calculated? 14.11.08
Execution time of an instruction can be determined by multiplying the number of clock pulses needed to execute the instruction by the clock period....
Write the use of Z bit in opcode? 14.11.08
It is used by REP instruction. Z bit helps to control the loop. It will be repeated the number of items indicated by the CX register or until Z bit dose not mat...
What is AAS instruction in 8086 ? 14.11.08
Adjust Result of ASCII Subtraction This instruction adjust the binary result of SUB or SBB instruction....
What is DAS instruction ? 14.11.08
DAS : Decimal Adjust After Subtraction This instruction converts the binary result of a SUB or SBB instruction in AL to Packed BCD format. It operates only on...
What are the five stages in a DLX pipeline? 10.11.08
The instruction sets can be differentiated by * Operand storage in the CPU * Number of explicit operands per instruction * Operand location * Operations...
What are the five stages in a DLX pipeline? 03.11.08
he instruction sets can be differentiated by * Operand storage in the CPU * Number of explicit operands per instruction * Operand location * Operati...